1. Field of the Invention
The present invention relates to a digital broadcast receiver, and more particularly to a deinterleaving device for digital broadcast receivers having a downsized deinterleaver memory and a deinterleaving method thereof.
2. Description of the Related Art
The European digital audio broadcasting (DAB) receiver compliant with ETSI EN 300 400 has a deinterleaver and a Viterbi decoder as inner decoders. The inner decoders input a DQPSK signal decoded with the 4-bit soft decision, so one data piece of information consists of 4 bits. In the ETSI EN 300 401, time deinterleaving is introduced to be distinguished from frequency deinterleaving.
The European DAB receiver performs the time deinterleaving over 16 Common Interleaved Frames (CIFs). The deinterleaver memory of about 4 Mbits in size is necessary for the deinterleaving. That is, one CIF consists of 55296 symbols, and one symbol denotes 4-bit data decoded with the soft decision. Since 16×55296×4 bits≈4 Mbits, the deinterleaver memory of about 4 Mbits in size is necessary to perform the deinterleaving over 16 CIFs.
FIG. 1 is a block diagram for schematically showing a deinterleaver for a conventional European DAB receiver. The deinterleaver has a memory 11, a write address generator 12, a write-enabling unit 13, a read address generator 14, a read-enabling unit 15, and a controller 21.
The memory 11 has 4 Mbit in size for performing deinterleaving over the 16 CIFs. The write address generator 12 generates write addresses corresponding to soft decision-decoded data symbols inputted according to the controls of the controller 21, the write-enabling unit 13 writes the data symbols inputted at the write addresses. On the other hand, the read address generator 14 generates read addresses according to a predetermined deinterleaving equation with respect to the 16 CIFs stored in the memory 11. Further, the read-enabling unit 15 reads the data symbols written in the read addresses and performs the deinterleaving over the read data symbols.
As above, the conventional deinterleaver memory address structure is as follows:
CIF address (4 bits)DATA address (15 bits)
That is, the deinterleaver memory address consists of a 4-bit CIF address and a 15-bit data address. One CIF independently operates, allowing easy data movement in the deinterleaving, but, in general, the data consisting of one CIF does not take up all the 15 bit places, which causes memory waste. Such an inefficiently large memory size has a disadvantage in terms of power consumption.
One of the methods reducing memory waste as above is to downsize a memory in one fourth by forcibly performing the hard decision decoding over a 4-bit hard-decision signal. Such a method does not affect the performance of the channel decoder under a good channel environment, but leads to a reduction of 2 dB in information symbols due to a hard-decision signal under a poor channel environment. When the signal-to-noise ratio is small, the performance of the channel decoder is deteriorated by that much.